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ltc2909 1 2909fb sel pin connection for input polarity combinations polarity adj1 adj2 sel pin ++ v cc +C open CC gnd precision triple/dual input uv, ov and negative voltage monitor desktop and notebook computers handheld devices network servers core, i/o monitor automotive two low voltage adjustable inputs (0.5v) pin selectable input polarity allows negative and ov monitoring guaranteed threshold accuracy: 1.5% 6.5v shunt regulator for high voltage operation low 50a quiescent current buffered 1v reference for negative supply offset input glitch rejection adjustable reset timeout period selectable internal timeout saves components open-drain ? r ? s ? t output accurate uvlo for 2.5v, 3.3v, 5v systems ultralow voltage reset: v cc = 0.5v guaranteed space saving 8-lead tsot-23 and 3mm 2mm dfn packages 3.3v uv/ov (window) monitor application with 200ms internal timeout (3.3v logic out) v cc adj1 ltc2909-2.5 ref adj2 rst sel r pu 10k fault output 2909 ta01a r p6 453k 3.3v r p5 10.7k r p4 76.8k c byp 100nf tmr gnd the ltc ? 2909 is a dual input monitor intended for a variety of system monitoring applications. polarity selection and a buffered reference output allow the ltc2909 to monitor positive and negative supplies for undervoltage (uv) and overvoltage (ov) conditions. the two inputs have a nominal 0.5v threshold, featuring tight 1.5% threshold accuracy over the entire operating temperature range. glitch ? ltering ensures reliable reset operation without false triggering. a third ? xed-threshold uvlo monitor on the parts v cc (also 1.5% accuracy) is available for standard logic supplies. the common reset output has a timeout that may use a preset 200ms, be set by an external capacitor or be disabled. a three-state input pin sets the input polarity of each adjustable input without requiring any external components. the ltc2909 provides a highly versatile, precise, space- conscious, micropower solution for supply monitoring. features descriptio u applicatio s u typical applicatio u , lt, ltc and ltm are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners.
ltc2909 2 2909fb terminal voltages v cc (note 3) ............................................. ?0.3v to 6v sel, } r } s } t .............................................. ?0.3v to 7.5v adj1, adj2 .......................................... ?0.3v to 7.5v tmr .......................................... ?0.3v to (v cc + 0.3v) terminal currents i vcc (note 3) ....................................................10ma i ref ....................................................................1ma order part number t jmax = 125c, e ja = 76c/w exposed pad (pin 9) may be left open or tied to gnd (pcb connection required for stated e ja ) *the temperature grade is identi? ed by a label on the shipping container. consult ltc marketing for parts speci? ed with wider operating temperature ranges. lbxg lbxg lbzs lbzs lbzt lbzt ltc2909cddb-2.5 ltc2909iddb-2.5 ltc2909cddb-3.3 ltc2909iddb-3.3 ltc2909cddb-5 ltc2909iddb-5 (notes 1, 2) absolute axi u rati gs w ww u operating temperature range ltc2909c ................................................ 0c to 70c ltc2909i .............................................? 40c to 85c storage temperature range dfn ....................................................? 65c to 125c tsot-23 .............................................? 65c to 150c lead temperature (soldering, 10 sec) tsot-23 ............................................................ 300c top view 9 ddb package 8-lead (3mm 2mm) plastic dfn 5 6 7 8 4 3 2 1sel tmr v cc rst adj1 adj2 ref gnd ltbxf ltbxf ltbzv ltbzv ltbzw ltbzw ltc2909cts8-2.5 ltc2909its8-2.5 ltc2909cts8-3.3 ltc2909its8-3.3 ltc2909cts8-5 ltc2909its8-5 adj1 1 adj2 2 ref 3 gnd 4 8 sel 7 tmr 6 v cc 5 rst top view ts8 package 8-lead plastic tsot-23 t jmax = 125c, e ja = 250c/w ddb part* marking order part number ts8 part* marking package/order i for atio uu w order options tape and reel: add #tr lead free: add #pbf lead free tape and reel: add #trpbf lead free part marking: http://www.linear.com/leadfree/
ltc2909 3 2909fb the denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. v cc = 2.5v (ltc2909-2.5), v cc = 3.3v (ltc2909-3.3), v cc = 5v (ltc2909-5), adj1 = adj2 = 0.55v, sel = ? oating, unless otherwise noted. (note 2) symbol parameter conditions min typ max units v cc(min) operating supply voltage ? r ? s ? t in correct state 0.5 v v cc(shunt) v cc shunt regulation voltage i vcc = 1ma, i vref = 0 6.0 6.5 6.9 v i cc v cc input current 2.175 < v cc < 6v 50 150 a v rt adj input threshold 0.4925 0.5000 0.5075 v v rt adj hysteresis (note 4) tmr = v cc 1.5 3.5 10.0 mv i adj adj input current v adj = 0.55v 15 na v cc(uvlo) v cc uvlo threshold ltc2909-2.5 ltc2909-3.3 ltc2909-5 2.175 2.871 4.350 2.213 2.921 4.425 2.250 2.970 4.500 v v v v cc(uvlo) uvlo hysteresis (note 4) tmr = v cc 0.3 0.7 2.0 % v ref buffered reference voltage v cc > 2.175v, i vref = 1ma 0.985 1.000 1.015 v i tmr(up) tmr pull-up current v tmr = 1v C1.5 C2.1 C2.7 a i tmr(down) tmr pull-down current v tmr = 1v 1.5 2.1 2.7 a t ? r ? s ? t(ext) reset timeout period, external c tmr = 2.2nf 16 20 25 ms t ? r ? s ? t(int) reset timeout period, internal v tmr = 0v 150 200 260 ms v tmr(dis) timer disable voltage v tmr rising v cc C 0.36 v cc C 0.25 v cc C 0.16 v v tmr(dis) timer disable hysteresis v tmr falling 60 110 150 mv v tmr(int) timer internal mode voltage v tmr falling 0.14 0.21 0.27 v v tmr(int) timer internal mode hysteresis v tmr rising 40 70 110 mv t prop adjx comparator propagation delay to ? r ? s ? t adjx driven beyond reset threshold (v rtx ) by 5mv 50 150 500 s t uv v cc undervoltage detect to ? r ? s ? tv cc less than uvlo threshold (v cc(uvlo) ) by 1% 50 150 500 s v ol( ? r ? s ? t) ? r ? s ? t output voltage low v cc = 0.5v, i = 5a v cc = 1v, i = 100a v cc = 3v, i = 2500a 0.01 0.01 0.10 0.15 0.15 0.30 v v v i oh( ? r ? s ? t) ? r ? s ? t output voltage high leakage ? r ? s ? t = v cc 1 a three-state input sel v il low level input voltage 0.4 v v ih high level input voltage 1.4 v v z pin voltage when left in open state i sel = 0a 0.9 v i sel(z) allowable leakage in open state 5 10 a a i sel sel input current sel = v cc or sel = gnd 25 a electrical characteristics note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: all currents into pins are positive; all voltages are referenced to gnd unless otherwise noted. note 3: v cc maximum pin voltage is limited by input current. since the v cc pin has an internal 6.5v shunt regulator, a low impedance supply which exceeds 6v may exceed the rated terminal current. operation from higher voltage supplies requires a series dropping resistor. see applications information. note 4: threshold voltages have no hysteresis unless the part is in comparator mode. hysteresis is one-sided, affecting only invalid-to-valid transitions. see applications information.
ltc2909 4 2909fb adj threshold voltage vs temperature v cc uvlo threshold variation vs temperature ref output voltage vs temperature ref output load regulation quiescent supply current vs temperature allowable glitch duration vs magnitude external timeout period vs capacitance reset timeout period vs temperature typical perfor a ce characteristics uw t a = 25c unless otherwise noted temperature ( c) ?50 threshold voltage, v rt (mv) 506 25 2909 g01 500 496 ?25 0 50 494 492 508 504 502 498 75 100 125 temperature ( c) ?50 threshold voltage variation (% of 25 c value) 0.5 1.0 1.5 25 75 2909 g02 0 ?0.5 ?25 0 50 100 125 ?1.0 ?1.5 temperature ( c) ?50 ref voltage, v ref (v) 1.005 1.010 0.015 25 75 2909 g03 1.000 0.995 ?25 0 50 100 125 0.990 0.985 i ref = 0a load current, i ref (ma) ?1 0.985 ref voltage, v ref (v) 0.990 0.995 1.000 1.005 1.010 1.015 v cc = 2.5v ?0.5 0 0.5 1 2909 g04 t a = 125 c t a = 25 c t a = ?40 c ref output line regulation supply voltage, v cc (v) 2 0.985 ref voltage, v ref (v) 0.990 0.995 1.000 1.005 34 5 6 2909 g05 1.010 1.015 2.5 3.5 4.5 5.5 t a = 125 c i ref = 0a t a = 25 c t a = ?40 c glitch percentage past threshold (%) 0.1 400 maximum allowable glitch duration ( s) 500 600 700 1 10 100 2909 g07 300 200 100 0 reset occurs above curve tmr pin capacitance, c tmr (nf) 10 reset timeout period, t rst (ms) 100 1000 10000 0.1 10 100 1000 2909 g08 1 1 temperature ( c) ?50 reset timeout period, t rst (ms) 220 240 260 25 75 2909 g09 200 180 ?25 0 50 100 125 160 140 internal external with 22nf capacitor temperature ( c) ?50 quiescent supply current, i cc ( a) 55 25 2909 g06 40 30 ?25 0 50 25 20 60 50 45 35 75 100 125 adj1 = 0.55v adj2 = 0.45v sel = open v cc = 5v v cc = 3.3v v cc = 2.5v
ltc2909 5 2909fb shunt regulation voltage vs temperature ? r ? s ? t output voltage vs v cc ? r ? s ? t pull-down current vs v cc ? r ? s ? t v ol vs i ? r ? s ? t i sel vs temperature typical perfor a ce characteristics uw t a = 25c unless otherwise noted temperature ( c) ?50 6.0 shunt regulation voltage, v cc(shunt) (v) 6.4 7.0 0 50 75 2909 g10 6.2 6.8 6.6 ?25 25 100 125 i cc = 10ma i cc = 1ma i cc = 100 a ? r ? s ? t output voltage vs v cc shunt regulation voltage vs supply current supply current, i cc (ma) shunt regulation voltage, v cc(shunt) (v) 7.0 6.2 6.8 6.6 6.4 0.01 1 10 100 2909 g11 6.0 0.1 t a = 25 c supply voltage, v cc (v) 0 rst voltage (v) 3 4 5 4 2909 g12 2 1 0 1 2 3 5 ltc2909-2.5 ltc2909-5 ltc2909-3.3 adj1 = 0.55 adj2 = 0.45 sel = open 10k pull-up r to v cc supply voltage, v cc (v) 0 0 rst voltage (v) 0.1 0.2 0.3 0.4 0.1 0.2 0.3 0.4 2909 g13 0.5 0.6 0.7 0.8 rst with 10k pull-up rst with 100k pull-up v cc supply voltage, v cc (v) 0 0 pull-down current, i rst (ma) 1 2 3 4 5 6 1234 2909 g14 5 adj1 = 0.55 adj2 = 0.55 sel = open rst at 150mv rst at 50mv ? r ? s ? t pull-down current vs v cc supply voltage, v cc (v) 0.01 pull-down current, i rst (ma) 0.1 1 0 0.4 0.6 0.8 0.001 0.0001 0.2 1 2909 g15 rst at 150mv rst at 50mv i sel vs temperature i rst (ma) 0 0 rst v ol (v) 0.2 0.4 0.6 0.8 1.0 5 10 15 20 1635 g07 25 30 v cc = 3v no pull-up r t a = 125 c t a = ?40 c t a = 25 c temperature ( c) ?50 ?25 ?10 i sel ( a) ?14 ?20 0 50 75 2909 g17 ?12 ?18 ?16 25 100 125 sel = gnd temperature ( c) ?50 ?25 10 i sel ( a) 14 20 0 50 75 2909 g18 12 18 16 25 100 125 sel = v cc
ltc2909 6 2909fb pi fu ctio s uuu adj1 (pin 1/pin 8): adjustable voltage input 1. input to voltage monitor comparator 1 (0.5v nominal threshold). the polarity of the input is selected by the state of the sel pin (refer to table 1). tie to ref if unused (with sel = v cc or open). adj2 (pin 2/pin 7): adjustable voltage input 2. input to voltage monitor comparator 2 (0.5v nominal threshold). the polarity of the input is selected by the state of the sel pin (refer to table 1). tie to gnd if unused (with sel = gnd or open). ref (pin 3/pin 6): buffered reference output. 1v nominal reference used for the offset of negative-monitoring appli- cations. the buffered reference can source and sink 1ma. the reference can drive a capacitive load of up to 1000pf. larger capacitance may degrade transient performance. this pin does not require a bypass capacitor, nor is one recommended. leave open if unused. gnd (pin 4/pin 5): device ground. ? r ? s ? t (pin 5/pin 4): open-drain inverted reset logic output. asserts low when any positive polarity input voltage is below threshold or any negative polarity input voltage is above threshold or v cc is below uvlo threshold. held low for a timeout after all voltage inputs are valid. requires an external pull-up resistor and may be pulled above v cc . (tsot-23/dfn package) v cc (pin 6/pin 3): power supply. bypass this pin to ground with a 0.1f (or greater) capacitor. operates as a direct supply input for voltages up to 6v. operates as a shunt regulator for supply voltages greater than 6v and should have a resistor between this pin and the supply to limit v cc input current to no greater than 10ma. when used without a current-limiting resistor, pin voltage must not exceed 6v. uvlo options allow v cc to be used as an accurate third ? xed 10% uv supply monitor. tmr (pin 7/pin 2): reset timeout control. attach an external capacitor (c tmr ) to gnd to set a reset timeout of 9ms/nf. a low leakage ceramic capacitor is recom- mended for timer accuracy. capacitors larger than 1f (9 second timeout) are not recommended. see applica- tions information for further details. leaving this pin open generates a minimum timeout of approximately 400s. a 2.2nf capacitor will generate a 20ms timeout. tying this pin to ground will enable the internal 200ms timeout. ty- ing this pin to v cc will disable the reset timer and put the part in comparator mode. signals from the comparator outputs will then go directly to ? r ? s ? t. sel (pin 8/pin 1): input polarity select three-state input. connect to v cc , gnd or leave unconnected in open state to select one of three possible input polarity combinations (refer to table 1). exposed pad (pin 9, dfn only): the exposed pad may be left unconnected. for better thermal contact, tie to a pcb trace. this trace must be grounded or unconnected.
ltc2909 7 2909fb block diagra w ? + ? + ? + adjustable pulse generator three-state decode three-state decode tmr rst gnd 2909 bd 200ms pulse generator ? + sel control 1 control 2 adj1 adj2 ref v cc v cc 6.5v + ? v cc 500mv + ? 1.000v sel gnd open v cc control 1 h l l control 2 h h l ti i g diagra s ww u v adj t prop 1v 1v 1v v rt v rt v cc(uvlo) t rst rst normal positive polarity input timing v adj t prop 1v v rt t prop v rt rst comparator mode positive polarity input timing v cc t uv 1v v cc(uvlo) t uv v cc(uvlo) rst comparator mode uvlo timing v adj t prop 1v v rt t prop v rt rst comparator mode negative polarity input timing v adj t prop t rst rst normal negative polarity input timing v cc t uv 2909 td t rst rst normal uvlo timing
ltc2909 8 2909fb applicatio s i for atio wu u u the ltc2909 is a low power, high accuracy dual/triple supply monitor with two adjustable inputs and an ac- curate uvlo. reset timeout may be selected with an external capacitor, set to an internally generated 200ms, or disabled entirely. the three-state polarity select pin (sel) chooses one of three possible polarity combinations for the adjustable input thresholds, as described in table 1. both input voltages (v adj1 and v adj2 ) must be valid (above threshold if con- ? gured for positive polarity, below threshold if con? gured for negative polarity), and v cc above the uvlo threshold for the reset timeout before ? r ? s ? t is released. the ltc2909 asserts the reset output during power-up, power-down and brownout conditions on any of the voltage inputs. power-up the ltc2909 uses proprietary low voltage drive circuitry for the ? r ? s ? t pin which holds ? r ? s ? t low with as little as 200mv of v cc . this helps prevent an unknown voltage on the ? r ? s ? t line during power-up. in applications where the low voltage pull-down capabil- ity is important, the supply to which the external pull-up resistor connects should be the same supply which powers the part. using the same supply for both ensures that ? r ? s ? t never ? oats above 200mv during power-up, as the pull- down ability of the pin will then increase as the required pull-down current to maintain a logic low increases. once v cc passes the uvlo threshold, polarity selection and timer initialization will occur. if the monitored supplies (adj1 and adj2) are valid, the appropriate timeout delay will begin, after which ? r ? s ? t will be released. otherwise, the part will wait until all supplies are valid (including v cc above the uvlo threshold) before beginning the timeout. power-down on power-down, once v cc drops below the uvlo threshold or either v adj becomes invalid, ? r ? s ? t asserts logic low. v cc of at least 0.5v guarantees a logic low of 0.15v at ? r ? s ? t. shunt regulator the ltc2909 contains an internal 6.5v shunt regulator on the v cc pin to allow operation from a high voltage supply. to operate the part from a supply higher than 6v, the v cc pin must have a series resistor, r cc , to the supply. this resistor should be sized according to the following equation: vv ma r vv a i smax cc smin vre () () ?. ?. 62 10 68 200 ? + f f where v s(min) and v s(max) are the operating minimum and maximum of the supply, and i vref is the maximum current the user expects to draw from the reference output. as an example, consider operation from an automobile bat- tery which might dip as low as 10v or spike to 60v. assume that the user will be drawing 100a from the reference. we must then pick a resistance between 5.4k and 10.7k. when the v cc pin is connected to a low impedance supply, it is important that the supply voltage never exceed 6v, or the shunt regulator may begin to draw large currents. some supplies may have nominal value suf? ciently close to the shunt regulation voltage to prevent sizing of the resistor according to the above equation. for such sup- plies, a 470 series resistor may be used. polarity selection the external connection of the sel pin selects the polarities of the ltc2909 adjustable inputs. sel may be connected to gnd, connected to v cc or left unconnected during normal operation. when left unconnected, the maximum leakage allowable from the pin to either gnd or v cc is 10a. table 1 shows the three possible selections of polarity based on sel connection. table 1. voltage threshold selection adj1 input adj2 input sel positive polarity (+) uv or (C) ov positive polarity (+) uv or (C) ov v cc positive polarity (+) uv or (C) ov negative polarity (C) uv or (+) ov open negative polarity (C) uv or (+) ov negative polarity (C) uv or (+) ov ground note: open = open circuit or driven by a three-state buffer in high impedance state with leakage current less than 10a. if the users application requires, the sel pin may be driven using a three-state buffer which satis? es the v il , v ih and leakage of the three-state pin.
ltc2909 9 2909fb if the state of the sel pin con? gures a given input as negative polarity, the voltage at the adjx pin must be below the trip point (0.5v nominal), or the ? r ? s ? t output will be pulled low. conversely, if a given input is con? gured as positive polarity, the pin voltage must be above the trip point or ? r ? s ? t will assert low. thus, a negative polarity input may be used to determine whether a monitored negative voltage is smaller in absolute value than it should be (Cuv), or a monitored positive voltage is larger than it should be (+ov). the opposite is true for a positive polarity input (Cov or +uv). these usages are also shown in table 1. for purposes of this applicatio s i for atio wu u u data sheet, a negative voltage is considered undervoltage if it is closer to ground than it should be (e.g., C4.3v for a C5v supply). proper con? guration of the sel pin and setting of the trip-points via external resistors allows for any two fault conditions to be detected. for example, the ltc2909 may monitor two supplies (positive, negative or one of each) for uv or for ov (or one uv and one ov). it may also monitor a single supply (positive or negative) for both uv and ov. tables 2a and 2b show example con? gurations for monitoring possible combinations of fault condition and supply polarity. adj1 adj2 sel 5v (uv) 15v (uv) r p2b 1.15m r p1b 137k r p1a 115k r p2a 3.09m ref sel = v cc 2 positive uv adj1 adj2 sel 5v (ov) 15v (ov) r p2b 1.33m r p1b 137k r p1a 200k r p2a 6.19m ref 2 positive ov adj1 adj2 sel ?5v (uv) ?15v (uv) r n2b 1.37m r n1b 133k r n1a 107k r n2a 3.09m ref 2 negative uv sel = gnd adj1 adj2 sel ?5v (ov) ?15v (ov) r n2b 1.37m r n1b 118k r n1a 309k r n2a 10.2m ref 2 negative ov adj1 adj2 sel ?15v (ov) 15v (uv) r n2 10.2m r n1 309k r p1 115k r p2 3.09m ref 1 positive uv, 1 negative ov adj1 adj2 sel ?15v (uv) 15v (ov) r n2 3.09m r n1 107k r p1 200k r p2 6.19m ref 1 positive ov, 1 negative uv table 2a. possible combinations of supply monitoring. for example purposes, all supplies are monitored at 5% tolerance and connections are shown only for adj1, adj2, ref, sel
ltc2909 10 2909fb applicatio s i for atio wu u u adjust input trip point the trip threshold for the supplies monitored by the adjust- able inputs is set with an external resistor divider, allowing the user complete control over the trip point. selection of this trip voltage is crucial to the reliability of the system. any power supply has some tolerance band within which it is expected to operate (e.g., 5v 10%). it is generally undesirable that a supervisor issue a reset when the power supply is inside this tolerance band. such a nuisance reset reduces reliability by preventing the system from functioning under normal conditions. to prevent nuisance resets, the supervisor threshold must be guaranteed to lie outside the power supply tolerance table 2b. possible combinations of supply monitoring. for example purposes, all supplies are monitored at 5% tolerance and connections are shown only for adj1, adj2, ref, sel adj1 adj2 sel 15v (uv/ov) r p6 2.37m r p5 10.7k r p4 76.8k ref sel open 1 positive uv and ov adj1 adj2 sel 5v (ov) 15v (uv) r p2b 1.33m r p1b 137k r p1a 115k r p2a 3.09m ref 1 positive uv, 1 positive ov 1 negative ov, 1 positive ov adj1 adj2 sel ?15v (uv/ov) r n6 10.2m r n4 309k r n5 40.2k ref 1 negative uv and ov adj1 adj2 sel 15v (ov) ?15v (ov) r p2 6.19m r p1 200k r n1 309k r n2 10.2m ref adj1 adj2 sel ?5v (uv) ?15v (ov) r n2b 1.37m r n1b 133k r n1a 309k r n2a 10.2m ref adj1 adj2 sel ?15v (uv) 15v (uv) r n2 3.09m r n1 107k r p1 115k r p2 3.09m ref 1 positive uv, 1 negative uv 1 negative uv, 1 negative ov band. to ensure that the threshold lies outside the power supply tolerance range, the nominal threshold must lie out- side that range by the monitors accuracy speci? cation. all three of the ltc2909 inputs (adj1, adj2, v cc uvlo) have the same relative threshold accuracy of 1.5% of the programmed nominal input voltage (over the full operating temperature range). therefore, using the ltc2909, the typical 10% uv threshold is at 11.5% below the nominal input voltage level. for a 5v input, the threshold is nominally 4.425v. with 1.5% accuracy, the trip threshold range is 4.425v 75mv over temperature (i.e., 10% to 13% below 5v). the monitored system must thus operate reliably down to 4.35v or 13% below 5v over temperature.
ltc2909 11 2909fb applicatio s i for atio wu u u the above discussion is concerned only with the dc value of the monitored supply. real supplies also have relatively high frequency variation from sources such as load transients, noise and pickup. these variations should not be considered by the monitor in determining whether a supply voltage is valid or not. the variations may cause spurious outputs at ? r ? s ? t, particularly if the supply voltage is near its trip threshold. a common solution to the problem of spurious reset is to introduce hysteresis around the nominal threshold. however, this hysteresis degrades the effective accuracy of the monitor and increases the range over which the system must operate. the ltc2909 therefore does not have hysteresis, except in comparator mode (see setting the reset timeout). if hysteresis is desired in other modes, it may be added externally. see typical applications for an example. the ltc2909 uses two techniques to combat spurious reset without sacri? cing threshold accuracy. first, the timeout period helps prevent high frequency variation whose frequency is above 1/ t rst from appearing at the ? r ? s ? t output. when either adj1 or adj2 becomes invalid, the ? r ? s ? t pin asserts low. when the supply recovers past the threshold, the reset timer starts (assuming it is not disabled) and ? r ? s ? t does not go high until it ? nishes. if the supply becomes invalid any time during the timeout period, the timer resets and starts fresh when the supply next becomes valid. while the reset timeout is useful at preventing toggling of the reset output in most cases, it is not effective at pre- venting nuisance resets due to short glitches (from load transients or other effects) on a valid supply. to reduce sensitivity to these short glitches, the comparator outputs go through a lowpass ? lter before triggering the output logic. any transient at the input of a comparator needs to be of suf? cient magnitude and duration to pass the ? lter before it can change the monitor state. the combination of the reset timeout and comparator ? ltering prevents spurious changes in the output state without sacri? cing threshold accuracy. if further supply glitch immunity is needed, the user may place an external capacitor from the adj input to ground. the resultant rc lowpass ? lter with the resistor divider will further reject high frequency components of the supply, at the cost of slowing the monitors response to fault conditions. selecting external resistors in a typical positive supply monitoring application, the adjx pin connects to a tap point on an external resistive divider between a positive voltage being monitored and ground, as shown in figure 1. when monitoring a negative supply, the adjx pin connects to a tap point on a resistive divider between the negative voltage being monitored and the buffered reference (ref), as shown in figure 2. ? + + ? 0.5v 2909 f01 adjx v mon r p2 r p1 ? + + ? 0.5v 2909 f02 adjx ref v mon r n1 r n2 figure 1. setting positive supply trip point figure 2. setting negative supply trip point normally the user will select a desired trip voltage based on their supply and acceptable tolerances, and a value of r n1 or r p1 based on current draw. current used by the resistor divider will be approximately: i v r x = 05 1 . recommended range is 1k to 1m.
ltc2909 12 2909fb for a positive-monitoring application, r p2 is then chosen by: r p2 = r p1 (2v trip C 1) for a negative-monitoring application: r n2 = r n1 (1 C 2v trip ) note that the value v trip should be negative for a nega- tive application. the ltc2909 can also be used to monitor a single supply for both uv and ov. this may be accomplished with three resistors, instead of the four required for two independent supplies. con? gurations are shown in figures 3 and 4. r p4 or r n4 may be chosen as is r p1 above. for a given r p4 , monitoring a positive supply: rr vv v rrv v v pp ov uv uv ppuv ov uv 54 64 21 = = () ? ? for monitoring a negative supply with a given r n4 : rr vv v rr v v v nn uv ov uv nn uv ov u 54 64 1 12 1 1 = = () ? ? ? ? ? v v for example, consider monitoring a C5v supply at 10%. for this supply application: v ov = C5.575v and v uv = C4.425v. suppose we wish to consume about 5a in the divider, so r n4 = 100k. we then ? nd r n5 = 21.0k, r n6 = 1.18m (nearest 1% standard values have been chosen). suggested values of resistors for 5% monitoring are shown in table 3. v cc monitoring/uvlo the ltc2909 contains an accurate third 10% undervoltage monitor on the v cc pin. this monitor is ? xed at a nominal 11.5% below the v cc speci? ed in the part number. the standard part (ltc2909-2.5) is con? gured to monitor a 2.5v supply (uvlo threshold of 2.213v), but versions to monitor 3.3v and 5.0v (uvlo of 2.921v and 4.425v, respectively) are available. for applications that do not need v cc monitoring, the 2.5v version should be used, and the uvlo will simply guarantee that the v cc is above the minimum required for proper threshold and timer accuracy before the timeout begins. setting the reset timeout the reset timeout of the ltc2909 may be con? gured in one of three ways: internal 200ms, programmed by external capacitor and no timeout (comparator mode). the mode of the timer is determined by the connection of the tmr pin. in externally-controlled mode, the tmr pin is connected by a capacitor to ground. the value of that capacitor allows for selection of a timeout ranging from about 400s to 10 seconds. see the following section for details. applicatio s i for atio wu u u ? + ? + + ? 0.5v 2909 f03 adj1 adj2 v mon r p5 r p6 r p4 figure 3. setting uv and ov trip point for a positive supply ? + ? + + ? 0.5v 2909 f04 adj2 adj1 ref v mon r n5 r n4 r n6 figure 4. setting uv and ov trip point for a negative supply
ltc2909 13 2909fb applicatio s i for atio wu u u if the user wishes to avoid having an external capacitor, the tmr pin should be tied to ground, switching the part to an internal 200ms timer. if the user requires a shorter timeout than 400s, or wishes to perform application-speci? c processing of the reset output, the part may be put in comparator mode by tying the tmr pin to v cc . in comparator mode, the timer is bypassed and comparator outputs go straight to the reset output. the current required to hold tmr at ground or v cc is about 2a. to force the pin from the ? oating state to ground or v cc may require as much as 100a during the transition. when the part is in comparator mode, one of the two means of preventing false reset has been removed, so a small amount of one-sided hysteresis is added to the inputs to prevent oscillation as the monitored voltage passes through the threshold. this hysteresis is such that the valid-to-invalid transition threshold is unchanged, but the invalid-to-valid threshold is moved by about 0.7%. thus, when the adj input polarity is positive, the threshold voltage is 500mv nominal when the in- put is above 500mv. as soon as the input drops below 500mv, the threshold moves up to 503.5mv nominal. conversely, when con? gured as a negative-polarity input, the threshold is 500mv when the input is below 500mv, and switches to 496.5mv when the input goes above 500mv. the comparator mode feature should be enabled by directly shorting the tmr pin to the v cc pin. connecting the pin to any other voltage may have unpredictable results. selecting the reset timing capacitor connecting a capacitor, c tmr , between the tmr pin and ground sets the reset timeout, t rst . the following formula approximates the value of capacitor needed for a particular timeout: c tmr = t ? r ? s ? t ? 110 [pf/ms] leaving the tmr pin open with no external capacitor generates a reset timeout of approximately 400s. maximum length of the reset timeout is limited by the ability of the part to charge a large capacitor on start-up. initially, with a large (discharged) capacitor on the tmr pin, the part will assume it is in internal timer mode (since the pin voltage will be at ground). if the 2a ? owing out of the tmr pin does not charge the capacitor to the ground- sense threshold within the ? rst 200ms after supplies become good, the internal timer cycle will complete and ? r ? s ? t will go high too soon. applicatio s i for atio wu u u table 3. suggested resistor values for 5% monitoring nominal voltage 5% uv 5% ov 5% uv and ov r x1 r x2 r x1 r x2 r x4 r x5 r x6 24 232k 10.2m 102k 5.11m 82.5k 11.5k 4.12m 15 115k 3.09m 200k 6.19m 76.8k 10.7k 2.37m 12 49.9k 1.07m 102k 2.49m 76.8k 10.7k 1.87m 9 115k 1.82m 78.7k 1.43m 162k 22.6k 2.94m 5 137k 1.15m 137k 1.33m 76.8k 10.7k 732k 3.3 221k 1.15m 340k 2.05m 76.8k 10.7k 453k 2.5 115k 422k 51.1k 221k 137k 19.1k 576k 1.8 63.4k 150k 115k 324k 82.5k 11.5k 221k 1.5 59.0k 107k 137k 301k 76.8k 10.7k 158k 1.2 127k 158k 102k 158k 187k 26.1k 267k 1 200k 174k 100k 113k 107k 15.0k 105k C5 133k 1.37m 118k 1.37m 174k 20.0k 2.00m C9 97.6k 1.74m 115k 2.32m 182k 22.6k 3.65m C12 107k 2.49m 40.2k 1.07m 40.2k 5.11k 1.07m C15 107k 3.09m 309k 10.2m 309k 40.2k 10.2m trip points are nominal voltage 6.5%.
ltc2909 14 2909fb applicatio s i for atio wu u u this imposes a practical limit of 1f (9 second timeout) if the length of timeout during power-up needs to be longer than 200ms. if the power-up timeout is not important, larger capacitors may be used, subject to the limitation that the capacitor leakage current must not exceed 500na, or the function of the timer will be impaired. ? r ? s ? t output characteristics the dc characteristics of the ? r ? s ? t pull-down strength are shown in the typical performance characteristics section. ? r ? s ? t is an open-drain pin and thus requires an external pull-up resistor to the logic supply. ? r ? s ? t may be pulled above v cc , providing the voltage limits of the pin are observed. the open-drain nature of the ? r ? s ? t pin allows for wired-or connection of several ltc2909s to monitor more than two supplies (see typical applications). other logic with open- drain outputs may also connect to the ? r ? s ? t line, allowing other logic-determined conditions to issue a reset. as noted in the discussion of power up and power down, the circuits that drive ? r ? s ? t are powered by v cc . during a fault condition, v cc of at least 0.5v guarantees a v ol of 0.15v at ? r ? s ? t . v cc adj1 ltc2909-2.5 ref adj2 rst sel r pu 10k r n2a 1.37m 15v 5v ?5v ?15v 3.3v 2.5v r n1a 133k r n2b 3.09m r n1b 107k r p2a 1.15m r p1a 137k r p2b 3.09m r p1b 115k c tmr1 2.2nf c tmr2 2.2nf c byp1 100nf c byp2 100nf tmr gnd v cc adj1 ltc2909-3.3 ref adj2 2909 ta02 rst sel tmr gnd system six supply undervoltage monitor with 2.5v reset output and 20ms timeout typical applicatio s u 12v uv monitor powered from 12v, 20ms timeout (1.8v logic out) v cc adj1 ltc2909-2.5 ref r p1b2 681k adj2 rst sel tmr m1 gnd r p1b 13.7k r p1a 18.7k r p2a2 169k v uv(rising) : 43.3v v uv(falling) : 38.7v v ov(rising) : 71.6v v ov(falling) : 70.2v r p2a 1.43m v in 36v to 72v r p2b 1.91m r cc 27k 0.25w c byp 100nf 5v r pu 10k 2909 ta03 m1, m2: fdg6301n or similar if loading of rst will exceed 1nf, a 1nf bypass capacitor on m1?s drain is recommended m2 system v cc adj1 ltc2909-2.5 1.8v ref adj2 rst sel r n1 107k r pu 10k fault output c tmr 2.2nf 2909 ta01b r p2 1.07m 12v ?12v r p1 49.9k *optional for esd manual reset pushbutton c byp 100nf r n2 2.49m 10k* r cc 10k tmr gnd 48v telecom uv/ov monitor with hysteresis
ltc2909 15 2909fb information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. package descriptio u ts8 package 8-lead plastic tsot-23 (reference ltc dwg # 05-08-1637) 1.50 ? 1.75 (note 4) 2.80 bsc 0.22 ? 0.36 8 plcs (note 3) datum ?a? 0.09 ? 0.20 (note 3) ts8 tsot-23 0802 2.90 bsc (note 4) 0.65 bsc 1.95 bsc 0.80 ? 0.90 1.00 max 0.01 ? 0.10 0.20 bsc 0.30 ? 0.50 ref pin one id note: 1. dimensions are in millimeters 2. drawing not to scale 3. dimensions are inclusive of plating 4. dimensions are exclusive of mold flash and metal burr 5. mold flash shall not exceed 0.254mm 6. jedec package reference is mo-193 3.85 max 0.52 max 0.65 ref recommended solder pad layout per ipc calculator 1.4 min 2.62 ref 1.22 ref ddb package 8-lead plastic dfn (3mm 2mm) (reference ltc dwg # 05-08-1702) 2.00 0.10 (2 sides) note: 1. drawing conforms to version (wecd-1) in jedec package outline m0-229 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package 0.38 0.10 bottom view?exposed pad 0.56 0.05 (2 sides) 0.75 0.05 r = 0.115 typ 2.15 0.05 (2 sides) 3.00 0.10 (2 sides) 1 4 8 5 pin 1 bar top mark (see note 6) 0.200 ref 0 ? 0.05 (ddb8) dfn 1103 0.25 0.05 0.50 bsc pin 1 chamfer of exposed pad 0.25 0.05 2.20 0.05 (2 sides) recommended solder pad pitch and dimensions 0.61 0.05 (2 sides) 1.15 0.05 0.675 0.05 2.50 0.05 package outline 0.50 bsc
ltc2909 16 2909fb linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com ? linear technology corporation 2005 lt 0807 rev b ? printed in usa typical applicatio u related parts automotive supply system with overvoltage, overcurrent and overtemperature protection and undervoltage reset part number description comments ltc1326/ltc1326-2.5 micropower precision triple supply monitor for 5v/2.5v, 3.3v and adj 4.725v, 3.118v, 1v threshold (0.75%) ltc1536 precision triple supply monitor for pci applications meets pci t fail timing speci? cations ltc1540 nanopower comparator with reference adjustable hysteresis ltc1726-2.5/ltc1726-5 micropower triple supply monitor for 2.5v/5v, 3.3v and adj adjustable reset and watchdog time-outs ltc1727/ltc1728 micropower triple supply monitor with open-drain reset individual monitor outputs in msop/5-lead sot-23 ltc1985-1.8 micropower triple supply monitor with push-pull reset output 5-lead sot-23 package ltc2900 programmable quad supply monitor adjustable reset, 10-lead msop and 3mm 3mm 10-lead dfn package ltc2901 programmable quad supply monitor adjustable reset and watchdog timer, 16-lead ssop package ltc2902 programmable quad supply monitor adjustable reset and tolerance, 16-lead ssop package, margining functions ltc2903 precision quad supply monitor 6-lead sot-23 package, ultralow voltage reset ltc2904/ltc2905 3-state programmable precision dual supply monitor adjustable tolerance and reset timer, 8-lead sot-23 package ltc2906/ltc2907 precision dual supply monitor 1-selectable and 1 adjustable separate v cc pin, rst/ ? r ? s ? t outputs/adjustable reset timer ltc2908 precision six supply monitor (four fixed and 2 adjustable) 8-lead sot-23 and ddb packages lt6700 micropower, low voltage, dual comparator with 400mv reference 6-lead sot-23 package v cc adj1 ltc2909-2.5 ref adj2 rst sel tmr r p1a 102k gnd v cc adj1 ltc2909-2.5 ref adj2 rst sel tmr v cc adj1 ltc2909-2.5 ref adj2 rst sel tmr gnd gnd r p1b 340k r p1c 51.1k r p1e 221k r p1d 49.9k ntc thermistor nths-1206n01 r25 = 100k r = 10.7k at 85 c r ref 10.7k r pu1 4.7k r l2 100k c g 10nf c byp1 100nf r l1 4.7k r fb2 100k r fb1 10k r cc 4.7k r p2a 2.49m r p2b 2.05m r p2c 221k r p2d 1.07m r p2e 1.15m r pu2 10k 2909 ta05 r g2 10 r g1 1k q2 q1 d1 2n6507 m1 irlz34 d1: 1n5238b or similar q1, q2: ffb2227 or similar v in 12v r s 0.01 c t 680nf c byp2 100nf on fb gate sense timer circuit breaker and crowbar gnd lt1641-2 pwrgd v cc dc/dc 2.5v 3.3v dc/dc c byp3 100nf system 12v ov and 3.3v ov detect 2.5v ov and t > 85 c detect 12v, 3.3v and 2.5v uv detect

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